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That time is upon us again, dear friends. That time when David sits down to take another 249 test. Its actually in about 3 hours, so I'm currently taking a brief study break so fill you in on the day's activities. This particular test we are responsible for knowing the entire block diagram (including all registers, signals, and bus widths) for the Parallel Port, the Addressing Unit, Data Unit, and Multiplex Databus Structure. I don't know if you recall, but on the last test that I made a 99 on, it was because I missed one measly little label in the entire UART design. So the chances that I'll miss one measly little label in 4 drawings is a little greater, but I have faith in myself.
The other things we need to know are ring detectors, which are retarded and easy. I'll teach any of you how to do one sometime. The other thing is to list every single addressing mode, there are 8 ... inherent, direct, relative, indexed, 8 bit offset, 16 bit offset, immediate and extended. That's easy enough. Then we have to give an opcode for each, an assembly code command example, and then hand compile it into RAM. That'll be a bitch. And naturally, all of this has to be done in 70 minutes. Wish me luck, you have nots, I am going to attempt again to make a 100 to average out that embarrassing 99. Time to study ... Laaaaaate.
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